Initial commit to branch; split done but untested
Signed-off-by: Collin J. Doering <collin.doering@rekahsoft.ca>
This commit is contained in:
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2a1073f658
commit
68d60151dc
11
lcdLib.c
11
lcdLib.c
@ -51,21 +51,12 @@ void loop_until_LCD_BF_clear(void) {
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LCD_RW_PORT |= (1 << LCD_RW); // RW=1
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// Set LCD_BF as input
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#if defined (FOUR_BIT_MODE) || defined (EIGHT_BIT_ARBITRARY_PIN_MODE)
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LCD_DBUS7_DDR &= ~(1 << LCD_BF);
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#else
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LCD_DBUS_DDR &= ~(1 << LCD_BF);
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#endif
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STATUS_LED_PORT |= 1 << STATUS_LED; // DEBUG
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do {
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clkLCD();
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}
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#if defined (FOUR_BIT_MODE) || defined (EIGHT_BIT_ARBITRARY_PIN_MODE)
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while (bit_is_clear(LCD_DBUS7_PIN, LCD_BF));
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#else
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while (bit_is_clear(LCD_DBUS_PIN, LCD_BF));
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#endif
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} while (bit_is_clear(LCD_DBUS7_PIN, LCD_BF));
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STATUS_LED_PORT &= ~(1 << STATUS_LED); // DEBUG
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#if defined (FOUR_BIT_MODE) || defined (EIGHT_BIT_ARBITRARY_PIN_MODE)
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145
lcdLib.h
145
lcdLib.h
@ -21,146 +21,51 @@
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* Date: Sep 29, 2015
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*/
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/*
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Usage
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=====
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Operates in 3 mutually exclusive modes:
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1. Default Mode
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8-bit mode that requires all its data bus lines be on the same PORT.
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2. EIGHT_BIT_ARBITRARY_PIN_MODE
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8-bit mode that allows the data bus lines to use any IO pin.
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3. FOUR_BIT_MODE
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4-bit mode that allows the data bus lines to use any IO pin.
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*/
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// Includes -------------------------------------------------------------------------------
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#include <avr/io.h>
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#include "lcdLibConfig.h"
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//------------------------------------------------------------------------------------------
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/*
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Screen characteristics (unused) TODO
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*/
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/* Mode and settings sanity check */
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#define LCD_NUMBER_OF_LINES 2
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#define LCD_CHARACTERS_PER_LINE 20
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#if !defined (LCD_RS) || !defined (LCD_RS_PORT) || !defined (LCD_RS_DDR) || !defined (LCD_RW) || !defined (LCD_RW_PORT) || !defined (LCD_RW_DDR) || !defined (LCD_ENABLE) || !defined (LCD_ENABLE_PORT) || !defined (LCD_ENABLE_DDR)
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#error "All modes require LCD_RS[,_PORT,_DDR], LCD_RW[,_PORT,_DDR], and LCD_ENABLE[,_PORT,_DDR] be defined."
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#endif
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#define LCD_CHARACTER_FONT
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/* Modes */
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// Default mode: 8-bit data bus
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// 8-bit mode with data bus on arbitrary pins
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//#define EIGHT_BIT_ARBITRARY_PIN_MODE
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// LCD in 4-bit mode (default is 8 bit mode)
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//#define FOUR_BIT_MODE
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// Mode sanity check
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#if defined (EIGHT_BIT_ARBITRARY_PIN_MODE) && defined (FOUR_BIT_MODE)
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#error "EIGHT_BIT_ARBITRARY_PIN_MODE and FOUR_BIT_MODE are mutually exclusive. Choose one."
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#endif
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/* All mode options */
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#define LCD_RS PD2
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#define LCD_RS_PORT PORTD
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#define LCD_RS_DDR DDRD
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#define LCD_RW PD3
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#define LCD_RW_PORT PORTD
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#define LCD_RW_DDR DDRD
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#define LCD_ENABLE PD4
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#define LCD_ENABLE_PORT PORTD
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#define LCD_ENABLE_DDR DDRD
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/*
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Mode specific settings
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*/
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/* Default Mode */
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// LCD data bus PORT, PIN and DDR.
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#define LCD_DBUS_PORT PORTB
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#define LCD_DBUS_DDR DDRB
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#define LCD_DBUS_PIN PINB
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// This must be set in default mode to the MSB of the data lines
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#define LCD_BF PB7
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/* EIGHT_BIT_ARBITRARY_PIN_MODE specific settings */
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#elif defined (EIGHT_BIT_ARBITRARY_PIN_MODE) || defined (FOUR_BIT_MODE)
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// EIGHT_BIT_ARBITRARY_PIN_MODE specific requirements
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#ifdef EIGHT_BIT_ARBITRARY_PIN_MODE
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#define LCD_DBUS0 PB0
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#define LCD_DBUS0_PORT PORTB
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#define LCD_DBUS0_DDR DDRB
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#define LCD_DBUS0_PIN PINB
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#define LCD_DBUS1 PB1
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#define LCD_DBUS1_PORT PORTB
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#define LCD_DBUS1_DDR DDRB
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#define LCD_DBUS1_PIN PINB
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#define LCD_DBUS2 PB2
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#define LCD_DBUS2_PORT PORTB
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#define LCD_DBUS2_DDR DDRB
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#define LCD_DBUS2_PIN PINB
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#define LCD_DBUS3 PB3
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#define LCD_DBUS3_PORT PORTB
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#define LCD_DBUS3_DDR DDRB
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#define LCD_DBUS3_PIN PINB
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#if !defined (LCD_DBUS0) || !defined (LCD_DBUS0_PORT) || !defined (LCD_DBUS0_DDR) || !defined (LCD_DBUS0_PIN) || !defined (LCD_DBUS1) || !defined (LCD_DBUS1_PORT) || !defined (LCD_DBUS1_DDR) || !defined (LCD_DBUS1_PIN) || !defined (LCD_DBUS2) || !defined (LCD_DBUS2_PORT) || !defined (LCD_DBUS2_DDR) || !defined (LCD_DBUS2_PIN) || !defined (LCD_DBUS3) || !defined (LCD_DBUS3_PORT) || !defined (LCD_DBUS3_DDR) || !defined (LCD_DBUS3_PIN)
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#error "EIGHT_BIT_ARBITRARY_PIN_MODE require that LCD_DBUS*[,_PORT,_DDR,_PIN] be defined."
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#endif
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#endif
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/* FOUR_BIT_MODE and EIGHT_BIT_ARBITRARY_PIN_MODE shared settings */
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#if defined (FOUR_BIT_MODE) || defined (EIGHT_BIT_ARBITRARY_PIN_MODE)
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#define LCD_DBUS4 PB4
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#define LCD_DBUS4_PORT PORTB
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#define LCD_DBUS4_DDR DDRB
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#define LCD_DBUS4_PIN PINB
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#define LCD_DBUS5 PB5
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#define LCD_DBUS5_PORT PORTB
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#define LCD_DBUS5_DDR DDRB
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#define LCD_DBUS5_PIN PINB
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#define LCD_DBUS6 PB6
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#define LCD_DBUS6_PORT PORTB
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#define LCD_DBUS6_DDR DDRB
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#define LCD_DBUS6_PIN PINB
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#define LCD_DBUS7 PB7
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#define LCD_DBUS7_PORT PORTB
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#define LCD_DBUS7_DDR DDRB
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#define LCD_DBUS7_PIN PINB
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// Requirements for EIGHT_BIT_ARBITRARY_PIN_MODE and FOUR_BIT_MODE
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#if !defined (LCD_DBUS4) || !defined (LCD_DBUS4_PORT) || !defined (LCD_DBUS4_DDR) || !defined (LCD_DBUS4_PIN) || !defined (LCD_DBUS5) || !defined (LCD_DBUS5_PORT) || !defined (LCD_DBUS5_DDR) || !defined (LCD_DBUS5_PIN) || !defined (LCD_DBUS6) || !defined (LCD_DBUS6_PORT) || !defined (LCD_DBUS6_DDR) || !defined (LCD_DBUS6_PIN) || !defined (LCD_DBUS7) || !defined (LCD_DBUS7_PORT) || !defined (LCD_DBUS7_DDR) || !defined (LCD_DBUS7_PIN)
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#error "Both EIGHT_BIT_ARBITRARY_PIN_MODE and FOUR_BIT_MODE require that LCD_DBUS*[,_PORT,_DDR,_PIN] be defined."
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#endif
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#if defined (FOUR_BIT_MODE) || defined (EIGHT_BIT_ARBITRARY_PIN_MODE)
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// Set LCD_BF automatically for both EIGHT_BIT_ARBITRARY_PIN_MODE and FOUR_BIT_MODE
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#undef LCD_BF
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#define LCD_BF LCD_DBUS7
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#else
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#if !defined (LCD_DBUS_PORT) || !defined (LCD_DBUS_DDR) || !defined (LCD_DBUS_PIN) || !defined (LCD_BF)
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#error "Default mode requires that LCD_DBUS_[PORT,DDR,PIN] and LCD_BF be defined."
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#endif
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/* LCD delays (in microseconds when unspecified) */
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#define LCD_ENABLE_HIGH_DELAY 25
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#define LCD_ENABLE_LOW_DELAY 25
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#define LCD_INIT_DELAY0 15000
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#define LCD_INIT_DELAY1 8200
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#define LCD_INIT_DELAY2 200
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#define LCD_CLEAR_DISPLAY_DELAY 16000
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#define LCD_RETURN_HOME_DELAY 16000
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#define LCD_GENERIC_INSTR_DELAY 50
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#undef LCD_DBUS7_PORT
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#define LCD_DBUS7_PORT LCD_DBUS_PORT
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#undef LCD_DBUS7_DDR
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#define LCD_DBUS7_DDR LCD_DBUS_DDR
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#undef LCD_DBUS7_PIN
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#define LCD_DBUS7_PIN LCD_DBUS_PIN
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#endif
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/* LCD Commands */
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147
lcdLibConfig.h
Normal file
147
lcdLibConfig.h
Normal file
@ -0,0 +1,147 @@
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/**
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* (C) Copyright Collin J. Doering 2015
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* File: lcdLibConfig.h
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* Author: Collin J. Doering <collin.doering@rekahsoft.ca>
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* Date: Oct 4, 2015
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*/
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// Includes -------------------------------------------------------------------------------
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#include <avr/io.h>
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//------------------------------------------------------------------------------------------
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/**
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Usage
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=====
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Operates in 3 mutually exclusive modes:
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1. Default Mode
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8-bit mode that requires all its data bus lines be on the same PORT.
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2. EIGHT_BIT_ARBITRARY_PIN_MODE
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8-bit mode that allows the data bus lines to use any IO pin.
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3. FOUR_BIT_MODE
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4-bit mode that allows the data bus lines to use any IO pin.
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*/
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/*
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Screen characteristics (unused) TODO
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*/
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#define LCD_NUMBER_OF_LINES 2
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#define LCD_CHARACTERS_PER_LINE 20
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#define LCD_CHARACTER_FONT
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/* Modes */
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// Default mode: 8-bit data bus
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// 8-bit mode with data bus on arbitrary pins
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//#define EIGHT_BIT_ARBITRARY_PIN_MODE
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// LCD in 4-bit mode (on arbitrary pins)
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//#define FOUR_BIT_MODE
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/* All mode options */
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#define LCD_RS PD2
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#define LCD_RS_PORT PORTD
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#define LCD_RS_DDR DDRD
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#define LCD_RW PD3
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#define LCD_RW_PORT PORTD
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#define LCD_RW_DDR DDRD
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#define LCD_ENABLE PD4
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#define LCD_ENABLE_PORT PORTD
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#define LCD_ENABLE_DDR DDRD
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/*
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Mode specific settings
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*/
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/* Default Mode */
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// LCD data bus PORT, PIN and DDR.
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#define LCD_DBUS_PORT PORTB
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#define LCD_DBUS_DDR DDRB
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#define LCD_DBUS_PIN PINB
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// This must be set in default mode to the MSB of the data lines
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#define LCD_BF PB7
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/* EIGHT_BIT_ARBITRARY_PIN_MODE specific settings */
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#define LCD_DBUS0 PB0
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#define LCD_DBUS0_PORT PORTB
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#define LCD_DBUS0_DDR DDRB
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#define LCD_DBUS0_PIN PINB
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#define LCD_DBUS1 PB1
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#define LCD_DBUS1_PORT PORTB
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#define LCD_DBUS1_DDR DDRB
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#define LCD_DBUS1_PIN PINB
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#define LCD_DBUS2 PB2
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#define LCD_DBUS2_PORT PORTB
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#define LCD_DBUS2_DDR DDRB
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#define LCD_DBUS2_PIN PINB
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#define LCD_DBUS3 PB3
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#define LCD_DBUS3_PORT PORTB
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#define LCD_DBUS3_DDR DDRB
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#define LCD_DBUS3_PIN PINB
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/* FOUR_BIT_MODE and EIGHT_BIT_ARBITRARY_PIN_MODE shared settings */
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#define LCD_DBUS4 PB4
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#define LCD_DBUS4_PORT PORTB
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#define LCD_DBUS4_DDR DDRB
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#define LCD_DBUS4_PIN PINB
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#define LCD_DBUS5 PB5
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#define LCD_DBUS5_PORT PORTB
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#define LCD_DBUS5_DDR DDRB
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#define LCD_DBUS5_PIN PINB
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#define LCD_DBUS6 PB6
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#define LCD_DBUS6_PORT PORTB
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#define LCD_DBUS6_DDR DDRB
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#define LCD_DBUS6_PIN PINB
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#define LCD_DBUS7 PB7
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#define LCD_DBUS7_PORT PORTB
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#define LCD_DBUS7_DDR DDRB
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#define LCD_DBUS7_PIN PINB
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/* LCD delays (in microseconds when unspecified) */
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#define LCD_ENABLE_HIGH_DELAY 25
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#define LCD_ENABLE_LOW_DELAY 25
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#define LCD_INIT_DELAY0 15000
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#define LCD_INIT_DELAY1 8200
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#define LCD_INIT_DELAY2 200
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#define LCD_CLEAR_DISPLAY_DELAY 16000
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#define LCD_RETURN_HOME_DELAY 16000
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#define LCD_GENERIC_INSTR_DELAY 50
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