2018-08-29 19:07:52 +00:00
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/*
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Copyright 2018 Massdrop Inc.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _SPI_H_
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#define _SPI_H_
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2018-12-10 19:28:06 +00:00
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/* Macros for Shift Register control */
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#define SR_EXP_RCLK_LO PORT->Group[SR_EXP_RCLK_PORT].OUTCLR.reg = (1 << SR_EXP_RCLK_PIN)
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#define SR_EXP_RCLK_HI PORT->Group[SR_EXP_RCLK_PORT].OUTSET.reg = (1 << SR_EXP_RCLK_PIN)
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#define SR_EXP_OE_N_ENA PORT->Group[SR_EXP_OE_N_PORT].OUTCLR.reg = (1 << SR_EXP_OE_N_PIN)
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#define SR_EXP_OE_N_DIS PORT->Group[SR_EXP_OE_N_PORT].OUTSET.reg = (1 << SR_EXP_OE_N_PIN)
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2018-08-29 19:07:52 +00:00
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2018-12-10 19:28:06 +00:00
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/* Determine bits to set for mux selection */
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#if SR_EXP_DATAOUT_PIN % 2 == 0
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2019-08-30 18:19:03 +00:00
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# define SR_EXP_DATAOUT_MUX_SEL PMUXE
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2018-12-10 19:28:06 +00:00
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#else
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2019-08-30 18:19:03 +00:00
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# define SR_EXP_DATAOUT_MUX_SEL PMUXO
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2018-12-10 19:28:06 +00:00
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#endif
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2018-08-29 19:07:52 +00:00
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2018-12-10 19:28:06 +00:00
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/* Determine bits to set for mux selection */
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#if SR_EXP_SCLK_PIN % 2 == 0
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2019-08-30 18:19:03 +00:00
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# define SR_EXP_SCLK_MUX_SEL PMUXE
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2018-12-10 19:28:06 +00:00
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#else
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2019-08-30 18:19:03 +00:00
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# define SR_EXP_SCLK_MUX_SEL PMUXO
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2018-12-10 19:28:06 +00:00
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#endif
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2018-08-29 19:07:52 +00:00
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2018-12-10 19:28:06 +00:00
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/* Data structure to define Shift Register output expander hardware */
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/* This structure gets shifted into registers LSB first */
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2018-08-29 19:07:52 +00:00
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typedef union {
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2019-08-30 18:19:03 +00:00
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struct {
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uint16_t RSVD4 : 1; /*!< bit: 0 */
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uint16_t RSVD3 : 1; /*!< bit: 1 */
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uint16_t RSVD2 : 1; /*!< bit: 2 */
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uint16_t RSVD1 : 1; /*!< bit: 3 */
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uint16_t SDB_N : 1; /*!< bit: 4 SHUTDOWN THE CHIP WHEN 0, RUN WHEN 1 */
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uint16_t IRST : 1; /*!< bit: 5 RESET THE IS3733 I2C WHEN 1, RUN WHEN 0 */
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uint16_t SRC_2 : 1; /*!< bit: 6 ADVERTISE A SOURCE TO USBC-2 CC */
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uint16_t SRC_1 : 1; /*!< bit: 7 ADVERTISE A SOURCE TO USBC-1 CC */
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uint16_t E_VBUS_2 : 1; /*!< bit: 8 ENABLE 5V OUT TO USBC-2 WHEN 1 */
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uint16_t E_VBUS_1 : 1; /*!< bit: 9 ENABLE 5V OUT TO USBC-1 WHEN 1 */
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uint16_t E_DN1_N : 1; /*!< bit: 10 ENABLE DN1 1:2 MUX WHEN 0 */
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uint16_t S_DN1 : 1; /*!< bit: 11 SELECT DN1 PATH 0:USBC-1, 1:USBC-2 */
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uint16_t E_UP_N : 1; /*!< bit: 12 ENABLE SUP 1:2 MUX WHEN 0 */
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uint16_t S_UP : 1; /*!< bit: 13 SELECT UP PATH 0:USBC-1, 1:USBC-2 */
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uint16_t HUB_RESET_N : 1; /*!< bit: 14 RESET USB HUB WHEN 0, RUN WHEN 1 */
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uint16_t HUB_CONNECT : 1; /*!< bit: 15 SIGNAL VBUS CONNECT TO USB HUB WHEN 1 */
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} bit; /*!< Structure used for bit access */
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uint16_t reg; /*!< Type used for register access */
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2018-12-10 19:28:06 +00:00
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} sr_exp_t;
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2018-08-29 19:07:52 +00:00
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2018-12-10 19:28:06 +00:00
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extern sr_exp_t sr_exp_data;
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2018-08-29 19:07:52 +00:00
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2018-12-10 19:28:06 +00:00
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void SR_EXP_WriteData(void);
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void SR_EXP_Init(void);
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2018-08-29 19:07:52 +00:00
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2019-08-30 18:19:03 +00:00
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#endif //_SPI_H_
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