Create central board for bluepill
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zvecr
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d3abebb601
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/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "hal.h"
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// Value to place in RTC backup register 10 for persistent bootloader mode
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#define RTC_BOOTLOADER_FLAG 0x424C
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
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{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
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{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
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{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
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{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
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};
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#endif
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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stm32_clock_init();
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}
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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//JTAG-DP Disabled and SW-DP Enabled
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AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
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//Set backup register DR10 to enter bootloader on reset
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BKP->DR10 = RTC_BOOTLOADER_FLAG;
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}
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/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for a Generic STM32F103 board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_STM32_F103_STM32DUINO
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#define BOARD_NAME "GENERIC STM32F103C8T6 board - stm32duino bootloader"
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/*
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* Board frequencies.
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*/
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#define STM32_LSECLK 32768
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#define STM32_HSECLK 8000000
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/*
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* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
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*/
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#define STM32F103xB
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/*
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* IO pins assignments
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*/
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/* on-board */
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#define GPIOA_LED 8
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#define GPIOD_OSC_IN 0
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#define GPIOD_OSC_OUT 1
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/* In case your board has a "USB enable" hardware
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controlled by a pin, define it here. (It could be just
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a 1.5k resistor connected to D+ line.)
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*/
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/*
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#define GPIOB_USB_DISC 10
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*/
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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*
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* The digits have the following meaning:
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* 0 - Analog input.
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* 1 - Push Pull output 10MHz.
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* 2 - Push Pull output 2MHz.
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* 3 - Push Pull output 50MHz.
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* 4 - Digital input.
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* 5 - Open Drain output 10MHz.
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* 6 - Open Drain output 2MHz.
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* 7 - Open Drain output 50MHz.
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* 8 - Digital input with PullUp or PullDown resistor depending on ODR.
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* 9 - Alternate Push Pull output 10MHz.
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* A - Alternate Push Pull output 2MHz.
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* B - Alternate Push Pull output 50MHz.
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* C - Reserved.
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* D - Alternate Open Drain output 10MHz.
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* E - Alternate Open Drain output 2MHz.
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* F - Alternate Open Drain output 50MHz.
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* Please refer to the STM32 Reference Manual for details.
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*/
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/*
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* Port A setup.
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* Everything input with pull-up except:
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* PA2 - Alternate output (USART2 TX).
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* PA3 - Normal input (USART2 RX).
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* PA9 - Alternate output (USART1 TX).
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* PA10 - Normal input (USART1 RX).
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*/
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#define VAL_GPIOACRL 0x88884B88 /* PA7...PA0 */
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#define VAL_GPIOACRH 0x888884B8 /* PA15...PA8 */
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#define VAL_GPIOAODR 0xFFFFFFFF
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/*
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* Port B setup.
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* Everything input with pull-up except:
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* PB10 - Push Pull output (USB switch).
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*/
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#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
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#define VAL_GPIOBCRH 0x88888388 /* PB15...PB8 */
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#define VAL_GPIOBODR 0xFFFFFFFF
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/*
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* Port C setup.
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* Everything input with pull-up except:
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* PC13 - Push Pull output (LED).
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*/
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#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
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#define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */
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#define VAL_GPIOCODR 0xFFFFFFFF
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/*
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* Port D setup.
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* Everything input with pull-up except:
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* PD0 - Normal input (XTAL).
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* PD1 - Normal input (XTAL).
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*/
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#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */
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#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
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#define VAL_GPIODODR 0xFFFFFFFF
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/*
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* Port E setup.
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* Everything input with pull-up except:
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*/
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#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
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#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
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#define VAL_GPIOEODR 0xFFFFFFFF
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/*
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* USB bus activation macro, required by the USB driver.
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*/
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/* The point is that most of the generic STM32F103* boards
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have a 1.5k resistor connected on one end to the D+ line
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and on the other end to some pin. Or even a slightly more
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complicated "USB enable" circuit, controlled by a pin.
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That should go here.
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However on some boards (e.g. one that I have), there's no
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such hardware. In which case it's better to not do anything.
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*/
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/*
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#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC)
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*/
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#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT);
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/*
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* USB bus de-activation macro, required by the USB driver.
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*/
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/*
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#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC)
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*/
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#define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12);
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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# List of all the board related files.
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BOARDSRC = $(BOARD_PATH)/boards/STM32_F103_STM32DUINO/board.c
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# Required include directories
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BOARDINC = $(BOARD_PATH)/boards/STM32_F103_STM32DUINO
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