8e614250b4
Co-authored-by: Pablo Martínez <58857054+elpekenin@users.noreply.github.com> Co-authored-by: Dasky <32983009+daskygit@users.noreply.github.com> Fixup delta frame coordinates after #20296.
136 lines
6.3 KiB
C
136 lines
6.3 KiB
C
// Copyright 2021-2023 Nick Brassel (@tzarc)
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "qp_internal.h"
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#include "qp_comms.h"
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#include "qp_ili9341.h"
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#include "qp_ili9xxx_opcodes.h"
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#include "qp_tft_panel.h"
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#ifdef QUANTUM_PAINTER_ILI9341_SPI_ENABLE
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# include <qp_comms_spi.h>
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#endif // QUANTUM_PAINTER_ILI9341_SPI_ENABLE
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Common
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// Driver storage
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tft_panel_dc_reset_painter_device_t ili9341_drivers[ILI9341_NUM_DEVICES] = {0};
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Initialization
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__attribute__((weak)) bool qp_ili9341_init(painter_device_t device, painter_rotation_t rotation) {
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// clang-format off
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const uint8_t ili9341_init_sequence[] = {
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// Command, Delay, N, Data[N]
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ILI9XXX_CMD_RESET, 120, 0,
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ILI9XXX_CMD_SLEEP_OFF, 5, 0,
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ILI9XXX_POWER_CTL_A, 0, 5, 0x39, 0x2C, 0x00, 0x34, 0x02,
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ILI9XXX_POWER_CTL_B, 0, 3, 0x00, 0xD9, 0x30,
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ILI9XXX_POWER_ON_SEQ_CTL, 0, 4, 0x64, 0x03, 0x12, 0x81,
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ILI9XXX_SET_PUMP_RATIO_CTL, 0, 1, 0x20,
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ILI9XXX_SET_POWER_CTL_1, 0, 1, 0x26,
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ILI9XXX_SET_POWER_CTL_2, 0, 1, 0x11,
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ILI9XXX_SET_VCOM_CTL_1, 0, 2, 0x35, 0x3E,
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ILI9XXX_SET_VCOM_CTL_2, 0, 1, 0xBE,
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ILI9XXX_DRV_TIMING_CTL_A, 0, 3, 0x85, 0x10, 0x7A,
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ILI9XXX_DRV_TIMING_CTL_B, 0, 2, 0x00, 0x00,
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ILI9XXX_SET_BRIGHTNESS, 0, 1, 0xFF,
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ILI9XXX_ENABLE_3_GAMMA, 0, 1, 0x00,
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ILI9XXX_SET_GAMMA, 0, 1, 0x01,
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ILI9XXX_SET_PGAMMA, 0, 15, 0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78, 0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00,
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ILI9XXX_SET_NGAMMA, 0, 15, 0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33, 0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F,
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ILI9XXX_SET_PIX_FMT, 0, 1, 0x05,
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ILI9XXX_SET_FRAME_CTL_NORMAL, 0, 2, 0x00, 0x1B,
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ILI9XXX_SET_FUNCTION_CTL, 0, 2, 0x0A, 0xA2,
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ILI9XXX_CMD_PARTIAL_OFF, 0, 0,
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ILI9XXX_CMD_DISPLAY_ON, 20, 0
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};
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// clang-format on
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qp_comms_bulk_command_sequence(device, ili9341_init_sequence, sizeof(ili9341_init_sequence));
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// Configure the rotation (i.e. the ordering and direction of memory writes in GRAM)
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const uint8_t madctl[] = {
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[QP_ROTATION_0] = ILI9XXX_MADCTL_BGR,
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[QP_ROTATION_90] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MV,
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[QP_ROTATION_180] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MY,
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[QP_ROTATION_270] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MV | ILI9XXX_MADCTL_MY,
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};
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qp_comms_command_databyte(device, ILI9XXX_SET_MEM_ACS_CTL, madctl[rotation]);
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return true;
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}
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver vtable
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const tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = {
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.base =
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{
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.init = qp_ili9341_init,
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.power = qp_tft_panel_power,
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.clear = qp_tft_panel_clear,
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.flush = qp_tft_panel_flush,
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.pixdata = qp_tft_panel_pixdata,
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.viewport = qp_tft_panel_viewport,
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.palette_convert = qp_tft_panel_palette_convert_rgb565_swapped,
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.append_pixels = qp_tft_panel_append_pixels_rgb565,
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.append_pixdata = qp_tft_panel_append_pixdata,
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},
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.num_window_bytes = 2,
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.swap_window_coords = false,
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.opcodes =
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{
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.display_on = ILI9XXX_CMD_DISPLAY_ON,
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.display_off = ILI9XXX_CMD_DISPLAY_OFF,
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.set_column_address = ILI9XXX_SET_COL_ADDR,
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.set_row_address = ILI9XXX_SET_PAGE_ADDR,
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.enable_writes = ILI9XXX_SET_MEM,
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},
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// SPI
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#ifdef QUANTUM_PAINTER_ILI9341_SPI_ENABLE
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// Factory function for creating a handle to the ILI9341 device
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painter_device_t qp_ili9341_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) {
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for (uint32_t i = 0; i < ILI9341_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &ili9341_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9341_driver_vtable;
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driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.native_bits_per_pixel = 16; // RGB565
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driver->base.panel_width = panel_width;
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driver->base.panel_height = panel_height;
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driver->base.rotation = QP_ROTATION_0;
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driver->base.offset_x = 0;
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driver->base.offset_y = 0;
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// SPI and other pin configuration
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driver->base.comms_config = &driver->spi_dc_reset_config;
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driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin;
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driver->spi_dc_reset_config.spi_config.divisor = spi_divisor;
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driver->spi_dc_reset_config.spi_config.lsb_first = false;
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driver->spi_dc_reset_config.spi_config.mode = spi_mode;
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driver->spi_dc_reset_config.dc_pin = dc_pin;
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driver->spi_dc_reset_config.reset_pin = reset_pin;
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driver->spi_dc_reset_config.command_params_uses_command_pin = false;
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if (!qp_internal_register_device((painter_device_t)driver)) {
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memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t));
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return NULL;
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}
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return (painter_device_t)driver;
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}
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}
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return NULL;
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}
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#endif // QUANTUM_PAINTER_ILI9341_SPI_ENABLE
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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