This website requires JavaScript.
Explore
Help
Sign In
rekahsoft
/
hack
Watch
1
Star
1
Fork
0
You've already forked hack
Code
Issues
Pull Requests
Releases
Wiki
Activity
master
hack
/
.gitignore
3 lines
6 B
Plaintext
Raw
Permalink
Normal View
History
Unescape
Escape
Fix gitignore files Ignore everything but vhdl source files in src, instead of at top level. Signed-off-by: Collin J. Doering <collin.doering@rekahsoft.ca>
2015-05-21 23:11:38 +00:00
*~
Preliminary implementation of Hack computer simulation Added two additional VHDL units 'src/ROM.vhdl' and "src/computer_tb.vhdl", both of which are only meant for simulation purposes. The ROM unit loads a text file specified by the generic property "program_file" and acts as a 32K ROM addressed by its line number (starting with zero). The computer_tb unit puts everything together (cpu, ROM, and ram16k) and allows the user to pass a program file via a generic property. This program file must contain less than 65535 lines containing 16 zeros or ones (eg. Something generated by the assembler given for the Nand to Tetris course). The directory "src/asm" was added containing a couple test programs in both hack assembly and in hack machine language. Additionally, various gtkwave save files (in 'src/wave/gtkw') were added for use with each hack program given, as well as two template gtkwave save files for use with new programs. See the README.md file for more details on running simulations with computer_tb, as well as various other details. TODO: implement memory maps for screen and keyboard and handle VGA output Signed-off-by: Collin J. Doering <collin.doering@rekahsoft.ca>
2015-06-05 23:14:14 +00:00
.*
Reference in New Issue
Copy Permalink