105 lines
2.1 KiB
Plaintext
105 lines
2.1 KiB
Plaintext
|
v 20130925 2
|
||
|
C 40000 40000 0 0 0 title-B.sym
|
||
|
C 48100 45300 1 0 0 EMBEDDED7400-1.sym
|
||
|
[
|
||
|
L 48400 45500 48400 46100 3 0 0 0 -1 -1
|
||
|
L 48400 46100 48800 46100 3 0 0 0 -1 -1
|
||
|
L 48400 45500 48800 45500 3 0 0 0 -1 -1
|
||
|
A 48800 45800 300 270 180 3 0 0 0 -1 -1
|
||
|
V 49150 45800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
|
||
|
P 49200 45800 49400 45800 1 0 1
|
||
|
{
|
||
|
T 49200 45850 5 8 1 1 0 0 1
|
||
|
pinnumber=3
|
||
|
T 49200 45750 5 8 0 1 0 2 1
|
||
|
pinseq=3
|
||
|
T 49050 45800 9 8 0 1 0 6 1
|
||
|
pinlabel=Y
|
||
|
T 49050 45800 5 8 0 1 0 8 1
|
||
|
pintype=out
|
||
|
}
|
||
|
P 48400 45600 48100 45600 1 0 1
|
||
|
{
|
||
|
T 48300 45650 5 8 1 1 0 6 1
|
||
|
pinnumber=2
|
||
|
T 48300 45550 5 8 0 1 0 8 1
|
||
|
pinseq=2
|
||
|
T 48450 45600 9 8 0 1 0 0 1
|
||
|
pinlabel=B
|
||
|
T 48450 45600 5 8 0 1 0 2 1
|
||
|
pintype=in
|
||
|
}
|
||
|
P 48400 46000 48100 46000 1 0 1
|
||
|
{
|
||
|
T 48300 46050 5 8 1 1 0 6 1
|
||
|
pinnumber=1
|
||
|
T 48300 45950 5 8 0 1 0 8 1
|
||
|
pinseq=1
|
||
|
T 48450 46000 9 8 0 1 0 0 1
|
||
|
pinlabel=A
|
||
|
T 48450 46000 5 8 0 1 0 2 1
|
||
|
pintype=in
|
||
|
}
|
||
|
T 48400 45300 9 8 1 0 0 0 1
|
||
|
7400
|
||
|
T 48600 46200 5 10 0 0 0 0 1
|
||
|
device=7400
|
||
|
T 48600 46400 5 10 0 0 0 0 1
|
||
|
slot=1
|
||
|
T 48600 46600 5 10 0 0 0 0 1
|
||
|
numslots=4
|
||
|
T 48600 46800 5 10 0 0 0 0 1
|
||
|
slotdef=1:1,2,3
|
||
|
T 48600 47000 5 10 0 0 0 0 1
|
||
|
slotdef=2:4,5,6
|
||
|
T 48600 47200 5 10 0 0 0 0 1
|
||
|
slotdef=3:9,10,8
|
||
|
T 48600 47400 5 10 0 0 0 0 1
|
||
|
slotdef=4:12,13,11
|
||
|
T 48400 46200 8 10 0 1 0 0 1
|
||
|
refdes=U?
|
||
|
T 48600 47550 5 10 0 0 0 0 1
|
||
|
footprint=DIP14
|
||
|
T 48600 47750 5 10 0 0 0 0 1
|
||
|
description=4 NAND gates with 2 inputs
|
||
|
T 48600 48150 5 10 0 0 0 0 1
|
||
|
net=Vcc:14
|
||
|
T 48600 48350 5 10 0 0 0 0 1
|
||
|
net=GND:7
|
||
|
T 48600 47950 5 10 0 0 0 0 1
|
||
|
documentation=http://www-s.ti.com/sc/ds/sn74hc00.pdf
|
||
|
]
|
||
|
{
|
||
|
T 48600 46200 5 10 0 0 0 0 1
|
||
|
device=7400
|
||
|
T 48600 47550 5 10 0 0 0 0 1
|
||
|
footprint=DIP14
|
||
|
T 48400 46200 5 10 1 1 0 0 1
|
||
|
refdes=U1
|
||
|
}
|
||
|
N 48100 45600 48100 46000 4
|
||
|
P 48100 45800 47700 45800 1 0 0
|
||
|
{
|
||
|
T 48100 45800 5 10 0 0 0 0 1
|
||
|
pintype=unknown
|
||
|
T 48100 45800 5 10 0 0 0 0 1
|
||
|
pinseq=0
|
||
|
T 47645 45795 5 10 1 1 0 6 1
|
||
|
pinlabel=cin
|
||
|
T 47695 45845 5 10 1 1 0 0 1
|
||
|
pinnumber=0
|
||
|
}
|
||
|
T 50100 40700 9 10 1 0 0 0 1
|
||
|
Not gate constructed from nand gate
|
||
|
P 49400 45800 49700 45800 1 0 0
|
||
|
{
|
||
|
T 49400 45800 5 10 0 0 0 0 1
|
||
|
pintype=unknown
|
||
|
T 49755 45795 5 10 1 1 0 0 1
|
||
|
pinlabel=cout
|
||
|
T 49705 45845 5 10 1 1 0 6 1
|
||
|
pinnumber=0
|
||
|
T 49400 45800 5 10 0 0 0 0 1
|
||
|
pinseq=0
|
||
|
}
|